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HIGH GATE BREAKDOWN VOLTAGE AND LOW LEAKAGE CURRENT USING SELECTIVE CITRIC ETCHANT ON THE SIDEWALL RECESSED AlGaAs/InGaAs PHEMTs

K. F. Yarn1,* , C. I. Liao2, Y. H. Wang2, M. P. Houng2

Affiliation

  1. Far East College, Department of Electronic Engineering, Hsin-Shih, Tainan, 744, Taiwan, ROC
  2. Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan, 701, Taiwan, ROC

Abstract

A novel effective and simple method of selective gate sidewall recess is proposed to expose the low barrier channel at mesa sidewalls during device isolation for Al0.2Ga0.8As/In0.15Ga0.85As PHEMTs (pseudomorphic high electron mobility transistors) by using a newly developed citric-acid-based etchant with high selectivity (>250) for GaAs/Al0.2Ga0.8As or In0.15Ga0.85As/Al0.2Ga0.8As interfaces. After sidewall recess, a revealed cavity will exist between the In0.15Ga0.85As layers and gate metals. Devices with 1·100 m2 typically exhibit a very low gate leakage current of 2.4 A/mm even at VGD=-10V and high gate breakdown voltage over 25V. In our experiments, the maximum gate breakdown voltages for gate-recessed devices with 1· 100 m2 and 2·100 m2 are up to 45V and 38.5V, respectively. As compared to that of non-recessed devices, over three orders of reduction in magnitude of gate leakage currents and over three times of increase in gate breakdown voltages are achieved..

Keywords

Citric etchant, Recessed AlGaAs/InGaAs, High electron mobility transistor.

Submitted at: July 1, 2005
Accepted at: Sept. 22, 2005

Citation

K. F. Yarn, C. I. Liao, Y. H. Wang, M. P. Houng, HIGH GATE BREAKDOWN VOLTAGE AND LOW LEAKAGE CURRENT USING SELECTIVE CITRIC ETCHANT ON THE SIDEWALL RECESSED AlGaAs/InGaAs PHEMTs, Journal of Optoelectronics and Advanced Materials Vol. 7, Iss. 5, pp. 2707-2712 (2005)