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ON THE USE OF THE THERMAL STEP METHOD AS A TOOL FOR CHARACTERIZING THIN LAYERS AND STRUCTURES FOR MICRO AND NANO-ELECTRONICS

P. Notingher jr.1,* , S. Agnel1, O. Fruchier1, A. Toureille1, B. Rousset2, J.-L. Sanchez2

Affiliation

  1. Laboratoire d’Electrotechnique de Montpellier, Université Montpellier 2, France
  2. Laboratoire d'Analyse et d'Architecture des Systèmes de Toulouse, France

Abstract

This work concerns the use of the thermal step method (TSM) for measuring electric charge in metal-oxyde-semiconductor (MOS) structures used in micro and nano-electronics. The TSM is a non destructive method for quantifying and localizing the electric charge in solid insulating materials and structures. Its principle is the application of a low thermal step to a short-circuited or dc-biased sample and the analysis of a current response, which depends on the charge present in the device. An adaptation of the technique (so far used in thick insulating materials and structures for electrical engineering) to short-circuited and biased MOS devices, is described. Results obtained on biased MOS structures and their correlation with classical capacitance-voltage (C-V) measurements are given. Estimations, by the TSM, of the amount of charge trapped in the oxide and of the space charge penetration depth in the silicon substrate are presented..

Keywords

Nano-electronics, MOS structure, Thermal step method.

Submitted at: May 5, 2004
Accepted at: June 22, 2004

Citation

P. Notingher jr., S. Agnel, O. Fruchier, A. Toureille, B. Rousset, J.-L. Sanchez, ON THE USE OF THE THERMAL STEP METHOD AS A TOOL FOR CHARACTERIZING THIN LAYERS AND STRUCTURES FOR MICRO AND NANO-ELECTRONICS, Journal of Optoelectronics and Advanced Materials Vol. 6, Iss. 3, pp. 1089-1096 (2004)