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Dielectric constant of nano porous silicon at low frequencies under reverse bias by a standard experimental model

R. S. DARIANI1,* , M. EINOLLAHZADEH-SAMADI1, Z. BAYINDIR2

Affiliation

  1. Department of Physics, Alzahra University, Tehran, 1993893973, Iran
  2. Institute for Research in Materials, Dalhousie University, Halifax, Canada

Abstract

Dielectric properties of layered structures of Gold/Porous Silicon/Silicon (Au/PS/Si) have been studied by applying alternating (AC) reverse bias voltages at low frequencies and at constant temperatures. The impedance measurements were carried out from 1 to 100 kHz, at room temperature when 20 mV AC reverse bias voltage was applied. The capacitance behavior of the structures was modeled in series combination by a standard equivalent circuit of two parallel RC networks. From the detailed analysis of the Au/PS/Si junction, the capacitance of the junction is calculated by using carrier concentration (NA) and depletion layer width (W) values. It is found that, the capacitance of Au/PS/Si structure is mainly due to PS. The aim of this work is to study the influence of etching time and the effect of frequency change on the dielectric properties and the DC conductivity of the PS. The PS dielectric constant decreases as the etching time decreases and the frequency increases. Our results confirm that there is a relationship between the dielectric constant and frequency and the relationship can be stated as ε ~ ω-1..

Keywords

Porous silicon, Electrochemical anodization, Dielectric properties, Electrical equivalent circuit.

Submitted at: April 19, 2014
Accepted at: Jan. 21, 2015

Citation

R. S. DARIANI, M. EINOLLAHZADEH-SAMADI, Z. BAYINDIR, Dielectric constant of nano porous silicon at low frequencies under reverse bias by a standard experimental model, Journal of Optoelectronics and Advanced Materials Vol. 17, Iss. 1-2, pp. 110-115 (2015)